What is Next for the AL Priority?

[radargeek]

Perhaps we could have a sweepstake or something, I'll take "ARM Cortex-M4".

Some time ago someone posted pics of the CPU innards, and there were two PIC24-series processors in there.

As for what was changed in the version 2 CPU, something in the way the external LED is driven. It could be as simple as moving the LED to a set of CPU I/O pins that have hardware PWM capability. Or, maybe a transistor was added to the LED common pin to allow PWMing all three colors by using a single I/O.

There could be other changes to account for parts availability, etc. Often there are board revisions because a part becomes unavailable and something else has to be used instead, or a cheaper part replacing a costlier one, or the same part is only available or cheaper in a different package type, etc, but with no affect on the actual operation of the unit.

[orwellophile]

Some time ago someone posted pics of the CPU innards, and there were two PIC24-series processors in there.

As for what was changed in the version 2 CPU, something in the way the external LED is driven. It could be as simple as moving the LED to a set of CPU I/O pins that have hardware PWM capability. Or, maybe a transistor was added to the LED common pin to allow PWMing all three colors by using a single I/O.

There could be other changes to account for parts availability, etc. Often there are board revisions because a part becomes unavailable and something else has to be used instead, or a cheaper part replacing a costlier one, or the same part is only available or cheaper in a different package type, etc, but with no affect on the actual operation of the unit.

I would assume a GPIO line with PWM capability was routed to an added transistor... oh wait, you just said that.

I'd be interested to see that pic, the box says Dual 16/32bit 100mhz. It could have been a PIC24 (16 bit) and a PIC32. The PIC32MX has the flash to store the 460KB firmware update, but only 128KB of SRAM. But it can run code from SRAM, so it's possible that it could self-update, loading a minimal set of instructions into memory, just enough to read the USB stick, and write to it's own flash (and decode the cipher).

My unit arrived today, so after I make sure it actually does work, I'll see for myself whats in the box

[orwellophile]

Good god that LED is bright!

[orwellophile]

Some time ago someone posted pics of the CPU innards, and there were two PIC24-series processors in there.

Here's one of the HW REV. 2 then.

[FJR1300]

Ha, the 24F chip has negative ipt marked on it!

[radargeek]

Ha, the 24F chip has negative ipt marked on it!

I think that's a hyphen they didn't wrap correctly. I indicates industrial temperature range (-40 to +85C) and the PT is the package type (quad flatpack). I got this info from the datasheet.

The PIC24FJ256GB106 is a 16 bit MCU with 256K of program flash, 16K of SRAM and USB 2.0 capability, multiple serial comm modules and up to 32 MHz (16 MIPS).
The PIC24HJ128GP204 is a 16 bit MCU with 128K of program flash, 8K of SRAM, and up to 80 MHz (40 MIPS).

I'm not sure where they get the 16/32 bit or 100 MHz from. It goes to show that a jammer doesn't need an Intel Core i7 in it to do its job well, and it's probably more powerful than the CPUs in even the newest lidar guns.

If I were to venture guesses as to what does what, I would say the 256GB106 handles the USB and communications duties (talking to the modules like the control set, RG module, USB port etc.) while the 128GP204 handles the jamming duties.

Here's the thread that has pics of the innards: http://radarandlaserforum.com/showth...-CPU-Internals

There must be a serial flash chip in there somewhere as well to store user settings and statistics, unless they're written to the program flash.

[FJR1300]

Yeah, just thought it was funny/ironic, not that it meant -ipt.

[hussein]

@radargeek I can't view that thread but I love the details in your post! Thanks.

[orwellophile]

something about serial flash

yeah, there's a whopper. 8 megabyte of flash. and i would agree about chip functions. the usb capable chip is probably also doing the AesDecode() that enables everyone's firmware to be unique, it's also capable of secure aes booting, running code from ram (not that i've noticed any), and other fun things. there's an ISCP header on the left (i say that, knowing full well that PIC doesn't use ISCP) if you want to try bricking yours. there's also a green led on either side of the board that flashes nicely (as in, not too brightly).

still, i am left wondering, if there's only 256 + 128 = 384k of flash, why are our U0000000.bin files 460K?

i'm also wondering if Mark has released an open protocol for the expansion port, since I just found out my V1 has one (expansion port, and open protocol. also on a 6pin connector).

BTW, this board has some of the smallest surface mount resistors I have almost never seen.

[orwellophile]

Yeah, just thought it was funny/ironic, not that it meant -ipt.

I got it. But only after 30 seconds of deciding whether or not you were an uber-expert. (Sorry, I had to vote negative)

And I also can't see the thread – if pulling a brand new ALP apart can't get you some respect in the secret forums where other people pull things apart, I just don't know what will. Possibly putting them back together, but I can't find the top anymore.